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Tm4clib-adc-functions

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ADC API Functions

adc_disable_int()

Disables a sample sequence interrupt.

Prototype:
void adc_disable_int(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function disables the requested sample sequence interrupt.
Returns: None.

adc_enable_int()

Enables a sample sequence interrupt.

Prototype:
void adc_enable_int(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function enables the requested sample sequence interrupt. Any outstanding interrupts are cleared before enabling the sample sequence interrupt.
Returns: None.

adc_clear_int()

Clears sample sequence interrupt source.

Prototype:
void adc_int_clear(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
The specified sample sequence interrupt is cleared, so that it no longer asserts. This function must be called in the interrupt handler to keep the interrupt from being triggered again immediately upon exit.
Note:
Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted).
Returns: None.

adc_enable_sequence()

Enables a sample sequence.

Prototype:
void adc_enable_sequence(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
Allows the specified sample sequence to be captured when its trigger is detected. A sample sequence must be configured before it is enabled.
Returns: None.

adc_disable_sequence()

Disables a sample sequence.

void adc_disable_sequence(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
Prevents the specified sample sequence from being captured when its trigger is detected. A sample sequence must be disabled before it is configured.
Returns: None.

adc_is_sequence_overflow()

Determines if a sample sequence overflow occurred.

Prototype:
int32_t adc_is_sequence_overflow(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters: ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function determines if a sample sequence overflow has occurred. Overflow happens if the captured samples are not read from the FIFO before the next trigger occurs.
Returns: Returns zero if there was not an overflow, and non-zero if there was.

adc_clear_sequence_overflow()

Clears the overflow condition on a sample sequence.

Prototype:
void adc_clear_sequence_overflow(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function clears an overflow condition on one of the sample sequences. The overflow condition must be cleared in order to detect a subsequent overflow condition (it otherwise causes no harm).
Returns: None.

adc_is_sequence_underflow()

Determines if a sample sequence underflow occurred.

Prototype:
int32_t adc_is_sequence_underflow(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function determines if a sample sequence underflow has occurred. Underflow happens if too many samples are read from the FIFO.
Returns: Returns zero if there was not an underflow, and non-zero if there was

adc_clear_sequence_underflow()

Clears the underflow condition on a sample sequence.

Prototype:
void adc_clear_sequence_underflow(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This function clears an underflow condition on one of the sample sequencers. The underflow condition must be cleared in order to detect a subsequent underflow condition (it otherwise causes no harm).
Returns: None.

adc_set_reference()

Selects the ADC reference.

Prototype: void adc_set_reference(uint32_t ui32Base, uint32_t ui32Ref)
Parameters:
ui32Base is the base address of the ADC module.
ui32Ref is the reference to use.
Description:
The ADC reference is set as specified by ui32Ref . It must be one of ADC_REF_INT, ADC_REF_EXT_3V, or ADC_REF_EXT_1V for internal or external reference.

If ADC_REF_INT is chosen, then an internal 3V reference is used and no external reference is needed. If ADC_REF_EXT_3V is chosen, then a 3V reference must be supplied to the AVREF pin. If ADC_REF_EXT_1V is chosen, then a 1V external reference must be supplied to the AVREF pin.
Note:
The ADC reference can only be selected on parts that have an external reference. Consult the data sheet for your part to determine if there is an external reference.
Returns: None.

adc_get_reference()

Returns the current setting of the ADC reference.

Prototype:
uint32_t adc_get_reference(uint32_t ui32Base)
Parameters:
ui32Base is the base address of the ADC module.
Description:
Returns the value of the ADC reference setting. The returned value is one of ADC_REF_INT, ADC_REF_EXT_3V, or ADC_REF_EXT_1V. Note:
The value returned by this function is only meaningful if used on a part that is capable of using an external reference. Consult the data sheet for your part to determine if it has an external reference input.
Returns: The current setting of the ADC reference.

adc_is_busy()

Determines whether the ADC is busy or not.

Prototype:
bool adc_is_busy(uint32_t ui32Base)
Parameters:
ui32Base is the base address of the ADC.
Description:
This function allows the caller to determine whether or not the ADC is currently sampling . If false is returned, then the ADC is not sampling data.

Use this function to detect that the ADC is finished sampling data before putting the device into deep sleep. Before using this function, it is highly recommended that the event trigger is changed to ADC_TRIGGER_NEVER on all enabled sequencers to prevent the ADC from starting after checking the busy status.
Returns: Returns true if the ADC is sampling or false if all samples are complete.

adc_processor_trigger()

Causes a processor trigger for a sample sequence.

Prototype:
void adc_processor_trigger(uint32_t ui32Base, uint32_t ui32SequenceNum)
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number, with ADC_TRIGGER_WAIT or ADC_TRIGGER_SIGNAL optionally ORed into it. Description:
This function triggers a processor-initiated sample sequence if the sample sequence trigger is configured to ADC_TRIGGER_PROCESSOR. If ADC_TRIGGER_WAIT is ORed into the sequence number, the processor-initiated trigger is delayed until a later processor-initiated trigger to a different ADC module that specifies ADC_TRIGGER_SIGNAL, allowing multiple ADCs to start from a processor-initiated trigger in a synchronous manner.
Returns: None.

adc_disabe_int_ext()

Disables ADC interrupt sources.

Prototype:
void adc_disabe_int_ext(uint32_t ui32Base, uint32_t ui32IntFlags)
Parameters:
ui32Base is the base address of the ADC module.
ui32IntFlags is the bit mask of the interrupt sources to disable.
Description:
This function disables the indicated ADC interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.
The ui32IntFlags parameter is the logical OR of any of the following:
ADC_INT_SS0 - interrupt due to ADC sample sequence 0.
ADC_INT_SS1 - interrupt due to ADC sample sequence 1.
ADC_INT_SS2 - interrupt due to ADC sample sequence 2.
ADC_INT_SS3 - interrupt due to ADC sample sequence 3.
ADC_INT_DMA_SS0 - interrupt due to DMA on ADC sample sequence 0.
ADC_INT_DMA_SS1 - interrupt due to DMA on ADC sample sequence 1.
ADC_INT_DMA_SS2 - interrupt due to DMA on ADC sample sequence 2.
ADC_INT_DMA_SS3 - interrupt due to DMA on ADC sample sequence 3.
ADC_INT_DMA_SS0 - interrupt due to digital comparator on ADC sample sequence 0.
ADC_INT_DCON_SS1 - interrupt due to digital comparator on ADC sample sequence 1.
ADC_INT_DCON_SS2 - interrupt due to digital comparator on ADC sample sequence 2.
ADC_INT_DCON_SS3 - interrupt due to digital comparator on ADC sample sequence 3.
Returns: None.

adc_enable_int_ext()

Enables ADC interrupt sources.

Prototype:
void adc_enable_int_ext(uint32_t ui32Base, uint32_t ui32IntFlags)
Parameters:
ui32Base is the base address of the ADC module.
ui32IntFlags is the bit mask of the interrupt sources to disable.
Description:
This function enables the indicated ADC interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor. The ui32IntFlags parameter is the logical OR of any of the following: ADC_INT_SS0 - interrupt due to ADC sample sequence 0.
ADC_INT_SS1 - interrupt due to ADC sample sequence 1.
ADC_INT_SS2 - interrupt due to ADC sample sequence 2.
ADC_INT_SS3 - interrupt due to ADC sample sequence 3.
ADC_INT_DMA_SS0 - interrupt due to DMA on ADC sample sequence 0.
ADC_INT_DMA_SS1 - interrupt due to DMA on ADC sample sequence 1.
ADC_INT_DMA_SS2 - interrupt due to DMA on ADC sample sequence 2.
ADC_INT_DMA_SS3 - interrupt due to DMA on ADC sample sequence 3.
ADC_INT_DMA_SS0 - interrupt due to digital comparator on ADC sample sequence 0.
ADC_INT_DCON_SS1 - interrupt due to digital comparator on ADC sample sequence 1.
ADC_INT_DCON_SS2 - interrupt due to digital comparator on ADC sample sequence 2.
ADC_INT_DCON_SS3 - interrupt due to digital comparator on ADC sample sequence 3.
Returns: None.

adc_clear_int_ext()

Clears the specified ADC interrupt sources.

Prototype:
void adc_clear_int_ext(uint32_t ui32Base, uint32_t ui32IntFlags)
Parameters:
ui32Base is the base address of the ADC port.
ui32IntFlags is the bit mask of the interrupt sources to disable.
Description:
Clears the interrupt for the specified interrupt source(s).
The ui32IntFlags parameter is the logical OR of the ADC_INT_∗ values. See the adc_enable_int_ext() function for the list of possible ADC_INT∗ values.
Note:
Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted).
Returns: None.

adc_comparator_configure()

Configures an ADC digital comparator.

Prototype:
void adc_comparator_configure(uint32_t ui32Base, uint32_t ui32Comp, uint32_t ui32Config)
Parameters:
ui32Base is the base address of the ADC module.
ui32Comp is the index of the comparator to configure.
ui32Config is the configuration of the comparator.
Description:
This function configures a comparator. The ui32Config parameter is the result of a logical OR operation between the ADC_COMP_TRIG_xxx, and ADC_COMP_INT_xxx values. The ADC_COMP_TRIG_xxx term can take on the following values:
ADC_COMP_TRIG_NONE to never trigger PWM fault condition.
ADC_COMP_TRIG_LOW_ALWAYS to always trigger PWM fault condition when ADC output is in the low-band.
ADC_COMP_TRIG_LOW_ONCE to trigger PWM fault condition once when ADC output transitions into the low-band.
ADC_COMP_TRIG_LOW_HALWAYS to always trigger PWM fault condition when ADC output is in the low-band only if ADC output has been in the high-band since the last trigger output.
ADC_COMP_TRIG_LOW_HONCE to trigger PWM fault condition once when ADC output transitions into low-band only if ADC output has been in the high-band since the last trigger output.
ADC_COMP_TRIG_MID_ALWAYS to always trigger PWM fault condition when ADC output is in the mid-band.
ADC_COMP_TRIG_MID_ONCE to trigger PWM fault condition once when ADC output transitions into the mid-band.
ADC_COMP_TRIG_HIGH_ALWAYS to always trigger PWM fault condition when ADC output is in the high-band.
ADC_COMP_TRIG_HIGH_ONCE to trigger PWM fault condition once when ADC output transitions into the high-band.
ADC_COMP_TRIG_HIGH_HALWAYS to always trigger PWM fault condition when ADC output is in the high-band only if ADC output has been in the low-band since the last trigger output.
ADC_COMP_TRIG_HIGH_HONCE to trigger PWM fault condition once when ADC output transitions into high-band only if ADC output has been in the low-band since the last trigger output.
The ADC_COMP_INT_xxx term can take on the following values:
ADC_COMP_INT_NONE to never generate ADC interrupt.
ADC_COMP_INT_LOW_ALWAYS to always generate ADC interrupt when ADC output is in the low-band.
ADC_COMP_INT_LOW_ONCE to generate ADC interrupt once when ADC output transitions into the low-band.
ADC_COMP_INT_LOW_HALWAYS to always generate ADC interrupt when ADC output is in the low-band only if ADC output has been in the high-band since the last trigger output.
ADC_COMP_INT_LOW_HONCE to generate ADC interrupt once when ADC output transitions into low-band only if ADC output has been in the high-band since the last trigger output.
ADC_COMP_INT_MID_ALWAYS to always generate ADC interrupt when ADC output is in the mid-band.
ADC_COMP_INT_MID_ONCE to generate ADC interrupt once when ADC output transitions into the mid-band.
ADC_COMP_INT_HIGH_ALWAYS to always generate ADC interrupt when ADC output is in the high-band.
ADC_COMP_INT_HIGH_ONCE to generate ADC interrupt once when ADC output transitions into the high-band.
ADC_COMP_INT_HIGH_HALWAYS to always generate ADC interrupt when ADC output is in the high-band only if ADC output has been in the low-band since the last trigger output.
ADC_COMP_INT_HIGH_HONCE to generate ADC interrupt once when ADC output transitions into high-band only if ADC output has been in the low-band since the last trigger output.
Returns: None.

adc_set_phase_delay()

Sets the phase delay between a trigger and the start of a sequence.

Prototype:
void adc_set_phase_delay(uint32_t ui32Base, uint32_t ui32Phase)
Parameters:
ui32Base is the base address of the ADC module.
ui32Phase is the phase delay, specified as one of ADC_PHASE_0, ADC_PHASE_22_5, ADC_PHASE_45, ADC_PHASE_67_5, ADC_PHASE_90, ADC_PHASE_112_5, ADC_PHASE_135, ADC_PHASE_157_5, ADC_PHASE_180, ADC_PHASE_202_5, ADC_PHASE_225, ADC_PHASE_247_5, ADC_PHASE_270, ADC_PHASE_292_5, ADC_PHASE_315, or ADC_PHASE_337_5.
Description:
This function sets the phase delay between the detection of an ADC trigger event and the start of the sample sequence. By selecting a different phase delay for a pair of ADC modules (such as ADC_PHASE_0 and ADC_PHASE_180) and having each ADC module sample the same analog input, it is possible to increase the sampling rate of the analog input (with samples N, N+2, N+4, and so on, coming from the first ADC and samples N+1, N+3, N+5, and so on, coming from the second ADC). The ADC module has a single phase delay that is applied to all sample sequences within that module.
Note:
This capability is not available on all parts.
Returns: None.

adc_get_phase_delay()

Gets the phase delay between a trigger and the start of a sequence.

Prototype:
uint32_t adc_get_phase_delay(uint32_t ui32Base)
Parameters:
ui32Base is the base address of the ADC module.
Description:
This function gets the current phase delay between the detection of an ADC trigger event and the start of the sample sequence.
Returns: Returns the phase delay, specified as one of ADC_PHASE_0, ADC_PHASE_22_5, ADC_PHASE_45, ADC_PHASE_67_5, ADC_PHASE_90, ADC_PHASE_112_5, ADC_PHASE_135, ADC_PHASE_157_5, ADC_PHASE_180, ADC_PHASE_202_5, ADC_PHASE_225, ADC_PHASE_247_5, ADC_PHASE_270, ADC_PHASE_292_5, ADC_PHASE_315, or ADC_PHASE_337_5.

adc_sequence_configure()

Configures the trigger source and priority of a sample sequence.

Prototype:
void adc_sequence_configure(uint32_t ui32Base, uint32_t ui32SequenceNum, uint32_t ui32Trigger, uint32_t ui32Priority);
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
ui32Trigger is the trigger source that initiates the sample sequence; must be one of the ADC_TRIGGER_∗ values.
ui32Priority is the relative priority of the sample sequence with respect to the other sample sequences.
Description:
This function configures the initiation criteria for a sample sequence. Valid sample sequencers range from zero to three; sequencer zero captures up to eight samples, sequencers one and two capture up to four samples, and sequencer three captures a single sample. The trigger condition and priority (with respect to other sample sequencer execution) are set.
The ui32Trigger parameter can take on the following values:
ADC_TRIGGER_PROCESSOR - A trigger generated by the processor, via the adc_processor_trigger() function.
ADC_TRIGGER_COMP0 - A trigger generated by the first analog comparator; configured with adc_comparator_configure().
ADC_TRIGGER_COMP1 - A trigger generated by the second analog comparator; configured with adc_comparator_configure().
ADC_TRIGGER_COMP2 - A trigger generated by the third analog comparator; configured with adc_comparator_configure().
ADC_TRIGGER_EXTERNAL - A trigger generated by an input from the Port B4 pin. Note that some microcontrollers can select from any GPIO using the GPIOADCTriggerEnable() function.
ADC_TRIGGER_TIMER - A trigger generated by a timer; configured with gptm_control_trigger().
ADC_TRIGGER_PWM0 - A trigger generated by the first PWM generator; configured with pwm_gen_enable_int_trig().
ADC_TRIGGER_PWM1 - A trigger generated by the second PWM generator; configured with pwm_gen_enable_int_trig().
ADC_TRIGGER_PWM2 - A trigger generated by the third PWM generator; configured with pwm_gen_enable_int_trig().
ADC_TRIGGER_PWM3 - A trigger generated by the fourth PWM generator; configured with pwm_gen_enable_int_trig().
ADC_TRIGGER_ALWAYS - A trigger that is always asserted, causing the sample sequence to capture repeatedly (so long as there is not a higher priority source active).
When ADC_TRIGGER_PWM0, ADC_TRIGGER_PWM1, ADC_TRIGGER_PWM2 or ADC_TRIGGER_PWM3 is specified, one of the following should be ORed into ui32Trigger to select the PWM module from which the triggers will be routed for this sequence:
ADC_TRIGGER_PWM_MOD0 - Selects PWM module 0 as the source of the PWM0 to PWM3 triggers for this sequence.
ADC_TRIGGER_PWM_MOD1 - Selects PWM module 1 as the source of the PWM0 to PWM3 triggers for this sequence.
Note that not all trigger sources are available on all Tiva family members; consult the data sheet for the device in question to determine the availability of triggers.
The ui32Priority parameter is a value between 0 and 3, where 0 represents the highest priority and 3 the lowest. Note that when programming the priority among a set of sample sequences, each must have unique priority; it is up to the caller to guarantee the uniqueness of the priorities.
Returns: None.

adc_int_status()

Gets the current interrupt status.

Prototype:
uint32_t adc_int_status(uint32_t ui32Base, uint32_t ui32SequenceNum, bool bMasked);
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required.
Description:
This function returns the interrupt status for the specified sample sequence. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.
Returns: The current raw or masked interrupt status.

adc_sequence_step_configure()

Configure a step of the sample sequencer.

Prototype:
void adc_sequence_step_configure(uint32_t ui32Base, uint32_t ui32SequenceNum, uint32_t ui32Step, uint32_t ui32Config);
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
ui32Step is the step to be configured.
ui32Config is the configuration of this step; must be a logical OR of ADC_CTL_TS, ADC_CTL_IE, ADC_CTL_END, ADC_CTL_D, one of the input channel selects (ADC_CTL_CH0 through ADC_CTL_CH23), and one of the digital comparator selects (ADC_CTL_CMP0 through ADC_CTL_CMP7).
Description:
This function configures the ADC for one step of a sample sequence. The ADC can be configured for single-ended or differential operation (the ADC_CTL_D bit selects differential operation when set), the channel to be sampled can be chosen (the ADC_CTL_CH0 through ADC_CTL_CH23 values), and the internal temperature sensor can be selected (the ADC_CTL_TS bit). Additionally, this step can be defined as the last in the sequence (the ADC_CTL_END bit) and it can be configured to cause an interrupt when the step is complete (the ADC_CTL_IE bit). If the digital comparators are present on the device, this step may also be configured to send the ADC sample to the selected comparator using ADC_CTL_CMP0 through ADC_CTL_CMP7. The configuration is used by the ADC at the appropriate time when the trigger for this sequence occurs.
Note: If the Digital Comparator is present and enabled using the ADC_CTL_CMP0 through ADC_CTL_CMP7 selects, the ADC sample is NOT written into the ADC sequence data FIFO. The ui32Step parameter determines the order in which the samples are captured by the ADC when the trigger occurs. It can range from zero to seven for the first sample sequencer, from zero to three for the second and third sample sequencer, and can only be zero for the fourth sample sequencer.
Differential mode only works with adjacent channel pairs (for example, 0 and 1). The channel select must be the number of the channel pair to sample (for example, ADC_CTL_CH0 for 0 and 1, or ADC_CTL_CH1 for 2 and 3) or undefined results are returned by the ADC. Additionally, if differential mode is selected when the temperature sensor is being sampled, undefined results are returned by the ADC.
It is the responsibility of the caller to ensure that a valid configuration is specified; this function does not check the validity of the specified configuration.
Returns: None.

adc_get_sequence_data()

Gets the captured data for a sample sequence.

Prototype:
int32_t adc_get_sequence_data(uint32_t ui32Base, uint32_t ui32SequenceNum, uint32_t *pui32Buffer); Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
pui32Buffer is the address where the data is stored.
Description:
This function copies data from the specified sample sequencer output FIFO to a memory resident buffer. The number of samples available in the hardware FIFO are copied into the buffer, which is assumed to be large enough to hold that many samples. This function only returns the samples that are presently available, which may not be the entire sample sequence if it is in the process of being executed.
Returns: Returns the number of samples copied to the buffer.

adc_int_status_ext()

Gets interrupt status for the specified ADC module.

Prototype:
uint32_t adc_int_status_ext(uint32_t ui32Base, bool bMasked);
'Parameters'Bold text:
ui32Base is the base address of the ADC module.
bMasked specifies whether masked or raw interrupt status is returned.
Description:
If bMasked is set as true, then the masked interrupt status is returned; otherwise, the raw interrupt status is returned.
Returns: Returns the current interrupt status for the specified ADC module. The value returned is the logical OR of the ADC_INT_∗ values that are currently active.

adc_set_clock_Config()

Sets the clock configuration for the ADC.

Prototype:
void adc_set_clock_Config(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32ClockDiv);
Parameters:
ui32Base is the base address of the ADC to configure, which must always be ADC0_BASE.
ui32Config is a combination of the ADC_CLOCK_SRC_ and ADC_CLOCK_RATE_∗ values used to configure the ADC clock input.
ui32ClockDiv is the input clock divider for the clock selected by the ADC_CLOCK_SRC value.
Description:
This function is used to configure the input clock to the ADC modules. The clock configuration is shared across ADC units so ui32Base must always be ADC0_BASE. The ui32Config value is logical OR of one of the ADC_CLOCK_RATE_ and one of the ADC_CLOCK_SRC_ values defined below. The ADC_CLOCK_SRC_∗ values determine the input clock for the ADC. Not all values are available on all devices so check the device data sheet to determine value configuration options. Regardless of the source, the final frequency for TM4C123x devices must be 16 MHz and for TM4C129x parts after dividing must be between 16 and 32 MHz.
Note:
For TM4C123x devices, if the PLL is enabled, the PLL/25 is used as the ADC clock unless ADC_CLOCK_SRC_PIOSC is specified. If the PLL is disabled, the MOSC is used as the clock source unless ADC_CLOCK_SRC_PIOSC is specified.
ADC_CLOCK_SRC_PLL - The main PLL output (TM4x129 class only).
ADC_CLOCK_SRC_PIOSC - The internal PIOSC at 16 MHz.
ADC_CLOCK_SRC_ALTCLK - The output of the ALTCLK in the system control module (TM4x129 class only).
ADC_CLOCK_SRC_MOSC - The external MOSC (TM4x129 class only).
ADC_CLOCK_RATE values control how often samples are provided back to the application. The values are the following:
ADC_CLOCK_RATE_FULL - All samples.
ADC_CLOCK_RATE_HALF - Every other sample.
ADC_CLOCK_RATE_QUARTER - Every fourth sample.
ADC_CLOCK_RATE_EIGHTH - Every either sample.
The ui32ClockDiv parameter allows for dividing a higher frequency down into the valid range for the ADCs. This parameter is typically only used ADC_CLOCK_SRC_PLL option because it is the only clock value that can be with the in the correct range to use the divider. The actual value ranges from 1 to 64.
Example: ADC Clock Configurations

/* Configure the ADC to use PIOSC divided by one (16 MHz) and sample at half the rate. */
adc_set_clock_Config(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_HALF, 1);
...
/* Configure the ADC to use PLL at 480 MHz divided by 24 to get an ADC clock of 20 MHz. */
adc_set_clock_Config(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 24);

Returns: None.

adc_get_clock_config()

Returns the clock configuration for the ADC.

Prototype:
uint32_t adc_get_clock_config(uint32_t ui32Base, uint32_t *pui32ClockDiv);
Parameters:
ui32Base is the base address of the ADC to configure, which must always be ADC0_BASE.
pui32ClockDiv is a pointer to the input clock divider for the clock selected by the ADC_CLOCK_SRC in use by the ADCs.
Description:
This function returns the ADC clock configuration and the clock divider for the ADCs..
Example: Read the current ADC clock configuration. .

uint32_t ui32Config, ui32ClockDiv;
 
/* Read the current ADC clock configuration. */
ui32Config = adc_get_clock_config(ADC0_BASE, &ui32ClockDiv);

Returns: The current clock configuration of the ADC defined as a combination of one of ADC_CLOCK_SRC_PLL, ADC_CLOCK_SRC_PIOSC, ADC_CLOCK_SRC_MOSC, or ADC_CLOCK_SRC_ALTCLK logical ORed with one of ADC_CLOCK_RATE_FULL, ADC_CLOCK_RATE_HALF, ADC_CLOCK_RATE_QUARTER, or ADC_CLOCK_RATE_EIGHTH. See adc_get_clock_config() for more information on these values.