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TM4C123GXL GPIO Init And Config

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GPIO Initialization and Configuration

The GPIO modules may be accessed via two different memory apertures. The legacy aperture, the Advanced Peripheral Bus (APB), is backwards-compatible with previous devices. The other aperture, the Advanced High-Performance Bus (AHB), offers the same register map but provides better back-to-back access performance than the APB bus. These apertures are mutually exclusive. The aperture enabled for a given GPIO port is controlled by the appropriate bit in the GPIOHBCTL register.

To configure the GPIO pins of a particular port, follow these steps:

  1. Set up the system clock
    Set up the system clock for the specific GPIO Port to enable the clock to drive the port by setting the appropriate bits in the GPIO Run Mode Clock Gating Control (RCGCG2) Register. More ...
  2. Unlock the port
    After enabling the clock some ports are still locked. This step is only needed for pins PC0-3, PD7 and PF0 on TM4C123GXL LaunchPad. More ...
  3. Disable Analog function
    Disable the analog function of the pin in the Analog Mode Select register (AMSEL) More ...
  4. Configure each bit as a GPIO Mode or Alternate Mode
    Optionally you can configure the GPIOAFSEL register to program each bit as a GPIO Mode or Alternate Mode. More ...
  5. Set up the direction for each pin on the GPIO
    Set up the direction for each pin on the GPIO port by programming the GPIODIR register. More ...
  6. Enable GPIO pins as digital I/Os
    To enable GPIO pins as digital I/Os, set the appropriate DEN bit in the GPIODEN register. More ...
  7. Setup the drive strength for each pin
    Optionally, you can setup the drive strength for each pin through the GPIODR2R, GPIODR4R, or GPIODR8R registers. More ...
  8. Configure each pad in the port to have pull-up, pull-down, or open drain function
    Optionally, you can configure each pad in the port to have pull-up, pull-down, or open drain function through the GPIOPUR, GPIOPDR , or GPIOODR register. More ...
  9. Set up the type, event, and mask of the interrupts for each port
    Optionally, you can configure the GPIOIS, GPIOIBE, GPIOEV, and GPIOIM registers to set up the type, event, and mask of the interrupts for each port if interrupts are used for the port. More ...
  10. Lock the configurations of the NMI and JTAG/SWD pins on the GPIO port
    Optionally, you can lock the configurations of the NMI and JTAG/SWD pins on the GPIO port pins by setting the LOCK bits in the GPIOLOCK register. More ...
  11. Read/Write Data Register
    The GPIODATA register is the data register. More ...