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Tm4clib-gpio-functions

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Revision as of 11:12, 27 December 2018 by Jshankar (Talk | contribs) (gpio_enable_ahb_aperture())

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GPIO Functions

gpio_clear()

static void gpio_clear (uint32_t gpioport, uint8_t gpios)
Clear one or more pins of the given GPIO port. This is an atomic operation.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing them together.

gpio_port_read()

static uint8_t gpio_port_read(uint32_t gpioport)
Read level of all pins from a port (atomic)
Read the current value of the given GPIO port. This is an atomic operation.

This is functionally identical to gpio_read (gpioport, GPIO_ALL).

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
Returns The level of all the pins on the GPIO port.

gpio_port_write()

static void gpio_write(uint32_t gpioport, uint8_t gpios, uint8_t data)
Set level of of all pins from a port (atomic)
Set the level of all pins on the given GPIO port. This is an atomic operation.

This is functionally identical to gpio_write (gpioport, GPIO_ALL, data).

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.
[in] data → Level to set pin to. Bit 0 of data corresponds to GPIO0, bit 1 to GPIO1. and so on.

gpio_read()

static uint8_t gpio_read(uint32_t gpioport, uint8_t gpios )
Get status of a Group of Pins (atomic)
Reads the level of the given pins. Bit 0 of the returned data corresponds to GPIO0 level, bit 1 to GPIO1 level. and so on. Bits corresponding to masked pins (corresponding bit of gpios parameter set to zero) are returned as 0.
This is an atomic operation.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.
Returns The level of the GPIO port. The pins not specified in gpios are masked to zero.

gpio_set()

static void gpio_set(uint32_t gpioport, uint8_t gpios)
Set a Group of Pins (atomic)
Set one or more pins of the given GPIO port. This is an atomic operation.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.

gpio_toggle()

void gpio_toggle(uint32_t gpioport, uint8_t gpios)
Toggle a Group of Pins.

Toggle one or more pins of the given GPIO port.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → Pin identifiers. GPIO pin identifiers

gpio_write()

static void gpio_write(uint32_t gpioport, uint8_t gpios, uint8_t data)
Set level of a Group of Pins (atomic)

Sets the level of the given pins. Bit 0 of the data parameter corresponds to GPIO0, bit 1 to GPIO1. and so on. Maskedpins (corresponding bit of gpios parameter set to zero) are returned not affected.

This is an atomic operation.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.
[in] data → Level to set pin to. Bit 0 of data corresponds to GPIO0, bit 1 to GPIO1. and so on.

gpio_clear_interrupt_flag()

static void gpio_clear_interrupt_flag(uint32_t gpioport, uint8_t gpios)

Mark interrupt as serviced.

After an interrupt is services, its flag must be cleared. If the flag is not cleared, then execution will jump back to the start of the ISR after the ISR returns.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses [in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.

gpio_configure_trigger()

void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger, uint8_t gpios)
Configure the interrupt trigger on the given GPIO pins.

Sets the Pin direction, analog/digital mode, and pull-up configuration of or a set of GPIO pins on a given GPIO port.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] trigger → Trigger configuration(gpio_trigger)

  • GPIO_TRIG_LVL_LOW – Trigger on low level
  • GPIO_TRIG_LVL_HIGH – Trigger on high level
  • GPIO_TRIG_EDGE_FALL – Trigger on falling edges
  • GPIO_TRIG_EDGE_RISE – Trigger on rising edges
  • GPIO_TRIG_EDGE_BOTH – Trigger on all edges

[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together

gpio_disable_interrupts()

void gpio_disable_interrupts(uint32_t gpioport, uint8_t gpios)
Disable interrupts on specified GPIO pins.

Disable interrupts on the specified GPIO pins

Note that the NVIC must be enabled and properly configured for the interrupt to be routed to the CPU.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Pins whose interrupts to disable. Any combination of pins may be specified by OR'ing them together.

gpio_enable_interrupts()

void gpio_enable_interrupts(uint32_t gpioport, uint8_t gpios)
Enable interrupts on specified GPIO pins.

Enable interrupts on the specified GPIO pins

Note that the NVIC must be enabled and properly configured for the interrupt to be routed to the CPU.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] gpios → GPIO pin identifiers. Pins whose interrupts to enable. Any combination of pins may be specified by OR'ing them together.

gpio_is_interrupt_source()

static bool gpio_is_interrupt_source(uint32_t gpioport, uint8_t srcpins)

Determine if interrupt is generated by the given pin.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] srcpins → source pin or group of pins to check.

gpio_enable_ahb_aperture()

void gpio_enable_ahb_aperture(void)
Enable access to GPIO registers via the AHB aperture.

All GPIO registers are accessed in tm4clib via the AHB aperture. It provides faster control over the older APB aperture. This aperture must be enabled before calling any other gpio_*() function.

gpio_mode_setup()

void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode, enum gpio_pullup pullup, uint8_t gpios)
Configure a group of pins.

Sets the Pin direction, analog/digital mode, and pull-up configuration of or a set of GPIO pins on a given GPIO port.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses [in] mode → Pin mode (gpio_mode)

  • GPIO_MODE_OUTPUT – Configure pin as output
  • GPIO_MODE_INPUT – Configure pin as input
  • GPIO_MODE_ANALOG – Configure pin as analog function

[in] pullup → Pin pullup/pulldown configuration (gpio_pullup)

  • GPIO_PUPD_NONE – Do not pull the pin high or low
  • GPIO_PUPD_PULLUP – Pull the pin high
  • GPIO_PUPD_PULLDOWN – Pull the pin low

[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together

gpio_set_af()

void gpio_set_af (uint32_t gpioport, uint8_t alt_func_num, uint8_t gpios)
Multiplex group of pins to the given alternate function.

Mux the pin or group of pins to the given alternate function. Note that a number of pins may be set but only with a single AF number. This is useful when one or more of a peripheral's pins are assigned to the same alternate function.

Because AF0 is not used on the LM4F, passing 0 as the alt_func_num parameter will disable the alternate function of the given pins.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses
[in] alt_func_num → Pin alternate function number or 0 to disable the alternate function
multiplexing.
[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together

gpio_set_output_config()

void gpio_set_output_config(uint32_t gpioport, enum gpio_output_type otype, enum gpio_drive_strength drive, uint8_t gpios)

Configure output parameters of a group of pins.

Sets the output configuration and drive strength, of or a set of GPIO pins for a set of GPIO pins in output mode.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses [in] otype → Output driver configuration (gpio_output_type)

  • GPIO_OTYPE_PP – Configure pin driver as push-pull
  • GPIO_OTYPE_OD – Configure pin driver as open drain

[in] drive → Pin drive strength (gpio_drive_strength)

  • GPIO_DRIVE_2MA – 2mA drive
  • GPIO_DRIVE_4MA – 4mA drive
  • GPIO_DRIVE_8MA – 8mA drive
  • GPIO_DRIVE_8MA_SLEW_CTL – 8mA drive with slew rate control

[in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together

gpio_unlock_commit()

void gpio_unlock_commit(uint32_t gpioport, uint8_t gpios) Unlock the commit control of a special function pin.

Unlocks the commit control of the given pin or group of pins. If a pin is a JTAG/SWD or NMI, the pin may then be reconfigured as a GPIO pin. If the pin is not locked by default, this has no effect.

Parameters
[in] gpioport → GPIO block register address base GPIO register base addresses [in] gpios → GPIO pin identifiers. Any combination of pins may be specified by OR'ing then together.